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Instructor:

Prof. Vivek Sarkar, vsarkar@rice.edu, DH 3080 (office hours by appointment)

Assistant Instructor:Dr. Jun Shirako, shirako@rice.edu, DH 3098

Administrative Assistant:

Annepha PembertonHurlock, annepha@rice.edu, DH 3080, 713-348-5186

Lectures:

Keck 107, TTh 09:25am - 10:40am (Backup time: 4pm - 5:15pm on Fridays, DH 3076)

Introduction

Are you curious about what makes a parallelizing compiler tick, and what program properties enable or prevent software from executing efficiently on vector and parallel computers?

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References

  1. Course text: Optimizing Compilers for Modern Architectures, Randy Allen & Ken Kennedy.
  2. Automatic Selection of High Order Transformations in the IBM XL Fortran Compilers.  Vivek Sarkar. IBM Journal of Research and Development, 41(3), May 1997.
  3. A General Framework for Iteration-Reordering Loop Transformations. Vivek Sarkar  and Radhika Thekkath. Proceedings of the ACM SIGPLAN 1992 Conference on  Programming Language Design and Implementation (PLDI), San Francisco, California,  pages 175-187, June 1992.
  4. Optimal Weighted Loop Fusion for Parallel Programs. Nimrod Megiddo and Vivek  Sarkar. Proceedings of the Ninth Annual ACM Symposium on Parallel Algorithms  and Architecture (SPAA), Newport, Rhode Island, June, 1997, pages 282-291.
  5. Array SSA form and its use in Parallelization. Kathleen Knobe and Vivek Sarkar.  Proceedings of the 25th ACM SIGPLAN-SIGACT Symposium on Principles of  Programming Languages, San Diego, California, January 1998.

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Grading will be based on your performance on six four homeworks (weighted 30% in all), one class project to be done in pairs (weighted 30%), and two exams (weighted 20% each).  Each project team will be expected to give a onean in-hour class presentation on their project at the end of the semester (Dec 1 or Dec 3), and to submit a report by December 11, 2015.

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